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Digital Electronics and Embedded Systems

23 Questions
GATE→2026→Digital Electronics→Digital Electronics and Embedded Systems
Q1
MCQ[1 Mark]
The maximum signal to quantization noise ratio (SQNR) for a 16-bit analog-to-digital converter is approximately _____ dB.
GATE→2026→Digital Electronics→Digital Electronics and Embedded Systems
Q2
NAT[1 Mark]
The minimum number of comparators required in a 6-bit flash analog-to-digital converter is (answer in integer)
GATE→2026→Digital Electronics→Digital Electronics and Embedded Systems
Q3
MCQ[2 Marks]
The initial state of Q3Q2Q1Q0Q_{3}Q_{2}Q_{1}Q_{0} in the digital circuit shown below is 1011. The new value of Q3Q2Q1Q0Q_{3}Q_{2}Q_{1}Q_{0} after two rising edges of the clock (CLK) will be
Figure for Question 3
GATE→2026→Digital Electronics→Digital Electronics and Embedded Systems
Q4
MSQ[2 Marks]
Which of the following functions represent(s) the output of the CMOS logic-gate shown in the circuit below?
Figure for Question 4
GATE→2026→Digital Electronics→Digital Electronics and Embedded Systems
Q5
MSQ[2 Marks]
A 16-bit processor has 16-bit wide instructions and a few internal registers. Every 16-bit instruction is encoded in a fixed format with one operation code of 7 bits and up to three operands. The operand can be an internal register and each operand is encoded by 3 bits. All the internal registers can be specified in an instruction using three bits. The correct statement(s) for this processor is/are
GATE→2025→Digital Electronics→Digital Electronics and Embedded Systems
Q6
MCQ[1 Mark]
The minimized expression of the Boolean function Y(P,Q,R)Y(P,Q,R) implemented by the multiplexer (MUX) circuit shown in the figure is
Figure for Question 6
GATE→2025→Digital Electronics→Digital Electronics and Embedded Systems
Q7
MCQ[1 Mark]
The 4-bit signed 2's complement form of (5)10+(5)10(5)_{10} + (5)_{10} is
GATE→2025→Digital Electronics→Digital Electronics and Embedded Systems
Q8
MCQ[1 Mark]
A Boolean function X is given as X=A‾B‾+A‾C‾X = \overline{A}\overline{B} + \overline{A}\overline{C}. The reduced form of X‾\overline{X} is
Figure for Question 8
GATE→2025→Digital Electronics→Digital Electronics and Embedded Systems
Q9
MCQ[2 Marks]
The clock frequency of the digital circuit shown in the figure is 12 MHz. The frequencies of the output (F) corresponding to Control = 0 and Control = 1, respectively, are
Figure for Question 9
GATE→2025→Digital Electronics→Digital Electronics and Embedded Systems
Q10
MCQ[2 Marks]
An 8-bit microprocessor has 16-bit address bus (A15−A0)(A_{15}-A_{0}) where A0A_{0} is the LSB... The address range for the newly added RAM is
Figure for Question 10
GATE→2024→Digital Electronics→Digital Electronics and Embedded Systems
Q11
MCQ[1 Mark]
Among the given options, the simplified form of the Boolean function F=(A+Aˉ.B)+Aˉ.(A+Bˉ).CF = (A + \bar{A}.B) + \bar{A}.(A + \bar{B}).C is
GATE→2024→Digital Electronics→Digital Electronics and Embedded Systems
Q12
MCQ[2 Marks]
In the figure shown, the positive edge triggered D flip-flops are initially reset to Q=0Q=0... The sequence of output Y from the 3rd3^{rd} clock to the 5th5^{th} clock, Y3Y4Y5Y_{3}Y_{4}Y_{5} is
Figure for Question 12
GATE→2023→Digital Electronics→Digital Electronics and Embedded Systems
Q13
MCQ[1 Mark]
The table shows the present state Q(t), next state Q(t+1), and the control input in a flip-flop. Identify the flip-flop.
GATE→2023→Digital Electronics→Digital Electronics and Embedded Systems
Q14
MCQ[1 Mark]
Match the Exclusive-OR (XOR) operations (i) to (iv) with the results (p) to (s), where X is a Boolean input.
GATE→2023→Digital Electronics→Digital Electronics and Embedded Systems
Q15
MCQ[1 Mark]
Choose the fastest logic family among the following:
GATE→2023→Digital Electronics→Digital Electronics and Embedded Systems
Q16
MCQ[2 Marks]
The simplified form of the Boolean function F(W,X,Y,Z)=Σ(4,5,10,11,12,13,14,15)F(W,X,Y,Z) = \Sigma(4,5,10,11,12,13,14,15) with the minimum number of terms and smallest number of literals in each term is
GATE→2023→Digital Electronics→Digital Electronics and Embedded Systems
Q17
MCQ[2 Marks]
For the given digital circuit, A=B=1A = B = 1... The frequency of steady-state oscillation of the output Y is
Figure for Question 17
GATE→2023→Digital Electronics→Digital Electronics and Embedded Systems
Q18
MCQ[2 Marks]
In the circuit shown, the initial binary content of shift register A is 1101 and that of shift register B is 1010... What will be the binary content of the shift registers A and B after four clock pulses?
Figure for Question 18
GATE→2022→Digital Electronics→Digital Electronics and Embedded Systems
Q19
MCQ[1 Mark]
The logic block shown has an output F given by
Figure for Question 19
GATE→2022→Digital Electronics→Digital Electronics and Embedded Systems
Q20
MSQ[1 Mark]
The output F of the digital circuit shown can be written in the form(s)
Figure for Question 20
GATE→2022→Digital Electronics→Digital Electronics and Embedded Systems
Q21
NAT[1 Mark]
An analog-to-digital converter with resolution 0.01 V converts analog signals between 0 V to +10 V to an unsigned binary output. The minimum number of bits (in integer) in the output is
GATE→2022→Digital Electronics→Digital Electronics and Embedded Systems
Q22
MCQ[2 Marks]
The digital circuit shown
Figure for Question 22
GATE→2022→Digital Electronics→Digital Electronics and Embedded Systems
Q23
MCQ[2 Marks]
A=a1a0A = a_{1}a_{0} and B=b1b0B = b_{1}b_{0} are two 2-bit unsigned binary numbers... then F can be minimized to the form